ADC0802 DATASHEET PDF

Yorg DGND, being careful to avoid ground loops. IC voltage regulators may be used for references if the ambient temperature changes are not excessive. For example, if the span is reduced to 2. Output Short Circuit Current.

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These devices are sensitive to electrostatic discharge. The output data latch is not updated if the conversion in progress is not completed.

In this application, the Datasheeh input is grounded and the WR. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start the conversion.

In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 dxtasheet of resolution. The output data latch is not updated if the. As long as the analog V IN does not exceed the supply voltage by more than. In general, the reference voltage will require an initial adjustment. In absolute conversion applicatIons, both the initial. Note that spans smaller than 2.

For example, if the. In reduced span applica. V REF The full scale adjustment can be made by applying a. In addition, the voltage reference input can be.

Two on-chip diodes are tied to each analog input see Block Diagram which. As long as the analog V IN does not exceed the supply voltage by more than 50mV, the output code will be correct. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start darasheet conversion process. However, if an all zero code is desired for an analog input other than 0V, or if a narrow full scale span.

Restart During a Conversion. The data from the. IC voltage regulators may be used for references if the. IC voltage regulators may be used for references if the ambient temperature changes are not excessive. However, if an all zero code is desired for an analog input other than 0V, or if a narrow full scale span exists for example: The differential analog voltage input has good common. The data from the previous conversion remain in this latch. DGND, being careful to avoid ground loops. Users should follow proper IC Handling Procedures.

ADC Datasheet An arbitrarily wide pulse width will hold the converter in a reset mode and the start of conversion is initiated by the low to high transition of the WR pulse see Timing Diagrams.

This WR and INTR node should be momentarily forced to logic low following a power- up cycle to insure circuit operation. In ratiometric converter applications. The separate AGND point should always be wired to the.

In general, the reference voltage will require an initial. For larger clock line loading, a CMOS or low power. Note that spans smaller. As can be seen, this reduces the allowed initial tolerance of the refer- ence voltage and requires correspondingly less absolute change with temperature variations.

The differential analog voltage input has good common- mode-rejection and permits offsetting the analog zero-input- voltage value. The converter can be made to output.

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